Cloud and Systems Integration Developer
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Intel Corporation develops and manufactures computing technologies used across personal computers, data centers, cloud infrastructure, edge systems, networking, and 5G environments. Its portfolio includes Intel Core, Xeon, and Atom processors, along with discrete graphics, AI accelerators, silicon photonics, embedded solutions, and networking and storage technologies. The company also supports developers through software tools and technical resources, with a focus on performance, security, and advancing AI-enabled computing.
Pre-Silicon Verification Engineer, PLL/FLL Clock IP
Verify Intel PLL and FLL clock-generator IP before silicon, developing UVM test environments and investigating design issues. Lead mixed-signal validation and work with design teams to refine IP features.
Description
- Build SystemVerilog and UVM test benches, verification environments, and tests.
- Verify PLL and FLL clock-generator IP against microarchitecture specifications.
- Maintain and improve verification infrastructure and methods across IP generations.
- Investigate and identify root causes of pre-silicon issues in the verification environment.
- Write test plans and take part in technical reviews with design teams.
- Work with architects, RTL developers, and analog design teams.
- Lead mixed-signal validation, including AMS simulations and schematic debugging.
- Resolve issues that involve multiple teams.
- Help define and refine architectural and microarchitectural features for IP design.
Requirements
- Bachelor’s degree in Electrical or Computer Engineering or a related field with at least 4 years of relevant experience; or a master’s degree with at least 3 years; or a PhD with at least 1 year.
- At least 2 years of experience with design verification and validation methods, including UVM, SystemVerilog, and standard EDA tools.
- At least 2 years of experience using scripting languages such as Python and Perl.
- Advanced skill in writing and debugging SystemVerilog UVM code.
- Familiarity with PLL/FLL or SoC clocking and related RTL development.
- Ability to work across teams with architects, RTL developers, and analog design teams.
- Careful documentation of test plans and debugging of pre-silicon issues.
- Proactive problem-solving and root-cause analysis skills.
Benefits
- Competitive pay.
- Stock bonuses.
- Health benefits.
- Retirement benefits.
- Vacation benefits.
- Hybrid work arrangement with time split between on-site and off-site work.
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