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Normal Computing
Normal Computing
51 – 200 कर्मचारी
The available profile information identifies Normal Computing as a company founded in 2022, but does not describe its products, services, industry, or hiring context. More company-specific details are needed to provide a useful overview for job seekers.
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कंपनी की नौकरियाँ

FPGA Hardware Engineer

Bring physics-inspired ASIC designs to life for AI and semiconductor infrastructure, owning RTL implementation, PCIe validation, FPGA prototyping, and silicon bring-up.

USसंयुक्त राज्यCAकैलिफ़ोर्नियाNYन्यूयॉर्क
$2,50,000 – $3,40,000 / वर्ष
हाइब्रिडपूर्णकालिकमध्य स्तरवरिष्ठआवश्यक भाषा: अंग्रेज़ीहार्डवेयर इंजीनियर
C++DockerPython

विवरण

  • Lead the selection, procurement, and bring-up of FPGA prototyping platforms for pre-silicon RTL validation and software development.
  • Adapt complex ASIC RTL for FPGA targets, including multi-clock architectures, CDC bridges, and timing closure on dense designs.
  • Integrate internal designs with third-party and vendor IP.
  • Guide use of the AMD/Xilinx ecosystem, including Vivado IP Integrator, transceivers, and memory controllers.
  • Design, implement, and validate high-speed I/O, particularly PCIe for accelerator cards in standard servers.
  • Build FPGA-based test designs for silicon bring-up, device characterization, and automated test environments.
  • Develop Python and C++ hardware abstraction software, register-map generation, and automated build and regression workflows.
  • Diagnose timing and functional issues in the lab using ILA/Vivado Analyzer, oscilloscopes, logic analyzers, and BER and eye-diagram characterization.
  • Collaborate daily with silicon, EDA, and research teams throughout the FPGA lifecycle.

आवश्यकताएँ

  • Demonstrated industry experience taking FPGA designs from RTL through timing closure to validated hardware.
  • Expert knowledge of SystemVerilog and/or VHDL for synthesis.
  • Strong proficiency with Xilinx Vivado, including synthesis, place and route, timing closure, and the IP catalog.
  • Practical experience implementing and debugging PCIe, AXI/AHB, SPI, UART, JTAG, and other common interfaces.
  • Strong Python skills for automation, testing, and build tools.
  • Strong board-level bring-up and hands-on lab debugging skills.
  • Ability to work independently, adapt quickly, and solve ambiguous problems across hardware, software, and physics.
  • Experience with verification frameworks such as Cocotb or UVM is a bonus.
  • Experience deploying machine learning models to FPGAs or building real-time, sub-microsecond signal-processing pipelines is a bonus.
  • Mixed-signal ASIC experience is a bonus.
  • SERDES tuning and signal-integrity fundamentals are a bonus.
  • Experience with hardware CI/CD using GitLab CI and Docker-based build and test workflows is a bonus.

लाभ

  • Equity.
  • An equal opportunity employer committed to diversity and inclusion.
  • Reasonable accommodations for people with disabilities.

संबंधित नौकरियाँ

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Hardware Engineer, Performance Modeling

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51 – 200 कर्मचारी
USसंयुक्त राज्यCAकैलिफ़ोर्नियाहाइब्रिडपूर्णकालिकमध्य स्तरवरिष्ठआवश्यक भाषा: अंग्रेज़ीहार्डवेयर इंजीनियर
C++Python

Build transaction-level performance models for Normal Computing’s physics-inspired AI ASICs. Compare model predictions with RTL, FPGA, and synthesis results to inform hardware architecture.

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Firmware Engineer

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51 – 200 कर्मचारी
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Develop embedded SoC firmware and APIs for Normal Computing’s AI and silicon systems. Build environments for development, simulation, debugging, verification, and stress testing.

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Senior DFT Hardware Engineer

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51 – 200 कर्मचारी
USसंयुक्त राज्यCAकैलिफ़ोर्नियाहाइब्रिडपूर्णकालिकवरिष्ठलीडआवश्यक भाषा: अंग्रेज़ीहार्डवेयर इंजीनियर
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Lead design-for-test for Normal Computing’s physics-inspired ASICs, covering scan, ATPG, MBIST, and silicon testability. Drive DFT architecture, verification, manufacturing readiness, and tapeout.

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Senior Analog Hardware Engineer

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51 – 200 कर्मचारी
USसंयुक्त राज्यCAकैलिफ़ोर्नियाहाइब्रिडपूर्णकालिकमध्य स्तरवरिष्ठआवश्यक भाषा: अंग्रेज़ीहार्डवेयर इंजीनियर

Design mixed-signal circuits, memory, and analog IP for Normal Computing’s applied AI and semiconductor systems. Build silicon technology spanning early circuit design through silicon bring-up.

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