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Normal Computing
Normal Computing
51 – 200 कर्मचारी
The available profile information identifies Normal Computing as a company founded in 2022, but does not describe its products, services, industry, or hiring context. More company-specific details are needed to provide a useful overview for job seekers.
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कंपनी की नौकरियाँ

Senior Analog Hardware Engineer

Design mixed-signal circuits, memory, and analog IP for Normal Computing’s applied AI and semiconductor systems. Build silicon technology spanning early circuit design through silicon bring-up.

USसंयुक्त राज्यCAकैलिफ़ोर्नियाहाइब्रिडपूर्णकालिकमध्य स्तरवरिष्ठआवश्यक भाषा: अंग्रेज़ीहार्डवेयर इंजीनियर

विवरण

  • Develop core mixed-signal technology for Normal Computing’s unconventional computing architecture
  • Design analog circuits, including library cells and macros
  • Work with silicon architecture, digital, and layout teams
  • Lead analog development from initial circuit design through parasitic extraction and silicon bring-up
  • Guide analog design-flow methods and the full development cycle, including research and exploratory design
  • Develop or source analog IP for Normal Silicon
  • Source analog EDA tools or help direct their development
  • Assess SRAM, DRAM, and compute-in-memory architectures

आवश्यकताएँ

  • Develop analog IP from specification through GDSII in modern technologies, including tapeout and silicon bring-up
  • Work with memory technologies such as SRAM and DRAM at the core level, including bitcell arrays and peripheral circuits
  • Design and characterize custom bitcells in schematic and layout
  • Use the Cadence flow, including Virtuoso, Spectre, Assembler, Extraction, Layout, HSMC, and Characterization
  • Understand noise and variation and how they affect silicon performance and reliability

लाभ

  • Competitive, equitable compensation
  • Performance-based incentives
  • Benefits supporting employee well-being and professional growth
  • Reasonable accommodations for disabilities

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Build transaction-level performance models for Normal Computing’s physics-inspired AI ASICs. Compare model predictions with RTL, FPGA, and synthesis results to inform hardware architecture.

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Develop embedded SoC firmware and APIs for Normal Computing’s AI and silicon systems. Build environments for development, simulation, debugging, verification, and stress testing.

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Lead design-for-test for Normal Computing’s physics-inspired ASICs, covering scan, ATPG, MBIST, and silicon testability. Drive DFT architecture, verification, manufacturing readiness, and tapeout.

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Bring physics-inspired ASIC designs to life for AI and semiconductor infrastructure, owning RTL implementation, PCIe validation, FPGA prototyping, and silicon bring-up.

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