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Normal Computing
Normal Computing
51 – 200 Angajați
Informațiile disponibile despre companie menționează că Normal Computing a fost fondată în 2022, dar nu descriu produsele, serviciile, domeniul de activitate sau contextul angajărilor sale. Sunt necesare mai multe detalii specifice companiei pentru a oferi o prezentare utilă celor care caută un loc de muncă.
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Hardware Engineer, Performance Modeling

Build transaction-level performance models for Normal Computing’s physics-inspired AI ASICs. Compare model predictions with RTL, FPGA, and synthesis results to inform hardware architecture.

USStatele Unite ale AmericiiCACaliforniaHibridNormă întreagăNivel mediuSeniorLimbă Obligatorie: englezăInginer hardware
C++Python

Descriere

  • Develop and maintain approximate, cycle-accurate transaction-level models of compute tiles, memory hierarchies, and interconnects using SystemC, C++, or Python.
  • Use transaction-level model (TLM) and RTL results alongside physical design data to calibrate latency, bandwidth, energy, utilization, and occupancy parameters for end-to-end AI workload predictions.
  • Provide the TLM as a reference model for design verification, with transaction-level scoreboards and performance checks.
  • Work with design verification (DV) and RTL teams to confirm RTL behavior and keep the TLM aligned with it.
  • Schedule modeling work in line with the hardware roadmap.
  • Study the performance impact of buffer sizes, interface widths, scheduling policies, and bus configurations.
  • Use modeling findings to recommend changes to architecture and hardware teams.
  • Compare TLM results with RTL, FPGA prototypes, and synthesis results.
  • Partner with architecture, hardware design, and DV teams to refine the end-to-end system.

Cerințe

  • At least five years of performance modeling experience at a major semiconductor company.
  • Demonstrated ability to understand architectures and translate them into efficient modeling code.
  • Experience with a range of modeling techniques and programming languages.
  • Strong written and verbal communication skills.
  • Experience with AI acceleration hardware is a plus.
  • Experience with architecture-level modeling and cost tools such as AccelForge, Timeloop/Accelergy, CACTI, McPAT, or gem6 is a plus.
  • Experience with design verification methodology is a plus.
  • Hands-on experience using LLMs or agentic tools in development workflows is a plus.
  • Exposure to analog, mixed-signal, or unconventional computing is a plus.
  • Experience with memory interfaces such as LPDDR, HBM, and DDR, and other I/O is a plus.

Beneficii

  • Equal opportunity employer committed to diversity and inclusion.
  • Reasonable accommodations are available for individuals with disabilities.

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