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Ralliant
Ralliant
5,001 – 10,000 कर्मचारी
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Ralliant एक वैश्विक प्रिसीजन टेक्नोलॉजी कंपनी है, जो विद्युतीकृत और डिजिटल उत्पादों के लिए इंजीनियर्ड घटक, असेंबली और सिस्टम तैयार करती है। इसका काम विनिर्माण, स्वास्थ्य सेवा और रक्षा क्षेत्रों में कठिन मांग वाले अनुप्रयोगों को सहयोग देता है, जिनमें चिकित्सा उपकरण और रक्षा प्रणालियाँ शामिल हैं। Ralliant जटिल आवश्यकताओं को विश्वसनीय उत्पादों में बदलने के लिए इंजीनियरों के साथ निकटता से काम करती है और अपने Ralliant Business System तथा विशेषीकृत प्रौद्योगिकी क्षमताओं के पोर्टफोलियो के माध्यम से प्रिसीजन मैन्युफैक्चरिंग को निरंतर सुधार के साथ जोड़ती है।
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कंपनी की नौकरियाँ

ASIC Design Manager (Hybrid)

Lead Tektronix’s digital ASIC organization and guide architecture, physical implementation, tapeout, silicon bring-up, and engineering team development for test and measurement platforms.

USसंयुक्त राज्यCOकोलोराडोORओरेगनहाइब्रिडपूर्णकालिकमध्य स्तरवरिष्ठआवश्यक भाषा: अंग्रेज़ीउत्पाद डिज़ाइनर

विवरण

  • Lead and develop digital ASIC design, verification, and physical design engineers
  • Own the complete digital ASIC lifecycle from microarchitecture and RTL through IP integration, physical design, signoff, tapeout, and silicon bring-up
  • Define technical direction for digital IP, subsystems, full-chip integration, and physical implementation
  • Direct physical design planning and execution, including floorplanning, power-grid architecture, clock distribution, congestion analysis, routing optimization, engineering change orders, and design closure
  • Use digital-on-top development flows for mixed-signal designs
  • Oversee signoff work covering static timing, signal integrity, power integrity, IR drop, electromigration, formal equivalence, DRC, LVS, and tapeout readiness
  • Work with product and system architects to convert requirements into ASIC specifications, partitioning approaches, interfaces, and performance goals
  • Coordinate delivery across UVM verification, DFT, CAD, packaging, validation, product engineering, foundry, and external design-services teams
  • Partner on die planning, bump assignments, power delivery, thermal performance, manufacturability, and package integration
  • Create and execute plans for schedules, resources, costs, milestones, and risk mitigation
  • Maintain design quality through defined methodologies, technical reviews, lint and CDC readiness, implementation checks, and signoff standards
  • Advance ASIC design flows, automation, and engineering practices
  • Support silicon bring-up, characterization, post-silicon debugging, and production-readiness work
  • Oversee contractors, external design-service providers, IP vendors, and technical partners
  • Participate hands-on in technical reviews and critical design or implementation tasks

आवश्यकताएँ

  • Bachelor’s degree in Electrical Engineering, Computer Engineering, a related technical discipline, or equivalent practical experience
  • Substantial experience developing ASICs or complex digital integrated circuits, including digital design and physical implementation
  • Background leading technical projects, mentoring engineers, or coordinating multidisciplinary engineering teams
  • Strong command of digital design methods, including microarchitecture, synthesizable SystemVerilog or Verilog RTL, IP integration, synthesis, constraint development, and static timing analysis
  • Experience with physical design and implementation, including several of floorplanning, power planning, clock-tree synthesis, place-and-route, timing closure, engineering change orders, power integrity, or physical signoff
  • Familiarity with ASIC verification, DFT, packaging, CAD, and silicon-validation interfaces and handoffs
  • Experience with industry-standard ASIC design, implementation, timing, or signoff tools from Cadence, Synopsys, Siemens EDA, or equivalent vendors
  • Experience taking an ASIC through major milestones such as design closure, tapeout, silicon bring-up, qualification, or production release
  • Strong communication, collaboration, organization, and problem-solving abilities
  • Preferred: experience managing or formally leading engineering teams, including hiring, coaching, career development, and resource planning
  • Preferred: Master’s or doctoral degree in Electrical Engineering, Computer Engineering, or a related field
  • Preferred: experience leading complete digital ASIC or SoC implementation through tapeout
  • Preferred: experience with high-speed digital or mixed-signal ASICs, DSP architectures, data-converter interfaces, or instrumentation applications
  • Preferred: experience with multi-mode, multi-corner timing analysis, signal-integrity analysis, IR-drop and electromigration verification, or related physical signoff methods
  • Preferred: experience optimizing designs for performance, power, area, yield, reliability, and manufacturability
  • Preferred: familiarity with flip-chip packaging, bump planning, package co-design, multi-chip modules, chiplets, or advanced packaging technologies
  • Preferred: experience with FPGA prototyping, emulation, or pre-silicon validation techniques
  • Preferred: experience working with foundries, OSAT partners, external IP vendors, EDA suppliers, or design-services providers
  • Preferred: experience improving ASIC development methodologies, automation, and team execution practices

लाभ

  • Help shape future Tektronix instrumentation platforms
  • Lead an engineering team responsible for strategic silicon development
  • Influence technology direction, engineering methods, and program delivery
  • Access professional development and ongoing learning opportunities
  • Work within a collaborative engineering culture
  • Help recruit and retain engineers while supporting their career growth and development

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