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Cisco is an enterprise technology company focused on networking, security, and digital infrastructure. Its portfolio includes routers, switches, optical transceivers, programmable silicon, edge computing platforms, Webex collaboration tools, observability products, AI-enabled software, and cloud-managed services. Cisco serves enterprises, service providers, and governments, supporting the design, operation, and security of large-scale networks and data centers through technology, professional services, training, and ongoing support.
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Senior ASIC Post-Silicon DFT Technical Leader

Lead post-silicon DFT for Cisco Silicon One networking chips, guiding bring-up, production quality, and design requirements. Coordinate hardware validation and production readiness across teams.

USUnited StatesCACaliforniaTXTexas
$177,600 – $257,400 / year
HybridFull-timeSeniorEnglish RequiredFull-stack EngineerSoftware Engineer

Description

  • Lead post-silicon DFT work in the Silicon One development organization as a senior ASIC technical lead
  • Coordinate with product engineering, reliability, board, package, functional test, and systems teams
  • Define the roadmap from post-silicon bring-up through production
  • Set DFT requirements early in the design cycle
  • Lead the post-silicon DFT team
  • Contribute to the development of next-generation networking chips
  • Guide post-silicon and quality processes throughout production from the DFT design perspective

Requirements

  • Bachelor’s or master’s degree in electrical or computer engineering
  • At least 12 years of experience
  • Experience in post-silicon validation, hardware bring-up, yield and reliability improvement, ramp acceleration, failure analysis efficiency, and production scalability
  • Experience partnering with DFT teams and supporting post-silicon validation from initial bring-up through high-volume production
  • Experience with gate-level simulation and debugging using VCS or other simulators
  • Post-silicon validation and debugging experience
  • Ability to work with ATE patterns and P1687
  • Verilog design experience, including custom DFT logic development and IP integration (preferred)
  • Familiarity with functional verification (preferred)
  • DFT CAD development experience across test architecture, methodology, and infrastructure (preferred)
  • Experience with test static timing analysis (preferred)

Benefits

  • Medical, dental, and vision insurance
  • 401(k) plan with Cisco matching contributions
  • Paid parental leave
  • Short- and long-term disability coverage
  • Basic life insurance
  • Cisco restricted stock unit grants may be available
  • 10 paid holidays per full calendar year
  • One floating holiday for non-exempt employees
  • One paid day off for employees’ birthdays
  • Paid year-end holiday shutdown
  • Four paid personal wellness days
  • 16 days of paid vacation per full calendar year for non-exempt employees
  • Flexible vacation time off for exempt employees
  • 80 hours of sick leave provided on hire and each January 1 thereafter
  • Carry forward up to 80 unused sick leave hours
  • Additional paid time off for critical or emergency family matters
  • Option to take 10 paid volunteer days per full calendar year
  • Annual bonuses for non-sales roles, subject to Cisco policies

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