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GlobalFoundries
GlobalFoundries
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GlobalFoundries is a semiconductor manufacturer serving high-growth markets through process technology, chip design support, development, and fabrication services. Its work combines engineering and manufacturing across a large, diverse workforce and production footprint spanning the United States, Europe, and Asia. For job seekers, GlobalFoundries offers opportunities connected to semiconductor technology, hardware manufacturing, process development, and advanced fabrication.
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Quantum PDK Design Enablement Engineer at GlobalFoundries

Develop and maintain DRC, LVS, and PEX rule decks and PDK components for GlobalFoundries semiconductor processes. Improve verification automation, extraction performance, and AI/ML-assisted qualification for customer designs.

USUnited StatesNYNew York
$85,000 – $146,000 / year
On-siteFull-timeJuniorEnglish RequiredDesigner
PerlPythonShell Scripting

Description

  • Create, code, qualify, and maintain DRC, LVS, and PEX rule decks alongside related PDK components
  • Convert process integration requirements, design rules, device definitions, and electrical models into physical verification and extraction solutions
  • Build regression and testing methods that measure rule-deck correctness, coverage, performance, scalability, and compatibility
  • Investigate DRC, LVS, and PEX problems, debug failures, and determine their root causes
  • Partner with process, modeling, design, EDA, reliability, circuit design, layout, and other technical teams
  • Create automation and AI/ML-assisted methods for rule and test generation, coverage analysis, error classification, anomaly detection, debugging, and continuous PDK verification
  • Improve physical verification and extraction flows for accuracy, execution time, memory efficiency, scalability, usability, and production deployment
  • Lead PDK qualification and release readiness through regression testing, documentation, change control, and ongoing improvement
  • Work safely while supporting Environmental, Health, Safety & Security requirements
  • Take on additional projects and assignments as required

Requirements

  • Bachelor’s degree in electrical engineering, computer engineering, microelectronics, computer science, applied physics, or a related technical discipline
  • Relevant experience in semiconductor PDK development, physical verification, EDA, IC physical design, parasitic extraction, or a related area, with experience expectations based on the applicable GF career level
  • Hands-on experience developing, coding, debugging, or qualifying DRC and/or LVS rules
  • Understanding of parasitic resistance and capacitance extraction, interconnect modeling, layout-dependent effects, and their impact on circuit performance
  • Working knowledge of CMOS technologies, semiconductor devices, layout rules, interconnect structures, and design-to-manufacturing relationships
  • Experience with standard physical verification or extraction platforms and rule-deck development practices
  • Proficiency with Python, Tcl, Perl, shell scripting, or an equivalent programming language
  • Ability to diagnose complex technical issues using structured root-cause analysis
  • Availability to travel up to 10%
  • Fluent written and spoken English
  • Master’s degree or PhD preferred
  • Experience with Siemens Calibre, Synopsys IC Validator, Cadence Pegasus/PVS, or comparable tools preferred
  • Experience developing PEX technology files, performing RC extraction, modeling process corners, and correlating models with silicon preferred
  • Experience with automated regression systems, rule-coverage metrics, test structures, or PDK qualification preferred
  • Experience applying AI/ML, generative AI, or data-driven methods to semiconductor design enablement preferred
  • Understanding of the relationships among process integration, design rules, OPC/lithography, device modeling, reliability, extraction, and circuit design preferred
  • Experience working with EDA vendors and design teams preferred
  • Typical background: BS with 4–5 years of experience, MS with 2–4 years, or PhD with 1–2 years

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