
Cisco is an enterprise technology company focused on networking, security, and digital infrastructure. Its portfolio includes routers, switches, optical transceivers, programmable silicon, edge computing platforms, Webex collaboration tools, observability products, AI-enabled software, and cloud-managed services. Cisco serves enterprises, service providers, and governments, supporting the design, operation, and security of large-scale networks and data centers through technology, professional services, training, and ongoing support.
ASIC Failure Analysis Engineer
Investigate silicon reliability and field failures across Cisco connectivity and infrastructure products. Build failure analysis processes and coordinate corrective actions with engineering teams.
Description
- Identify root causes of silicon failures found in reliability testing and in the field.
- Recommend corrective actions based on analysis findings.
- Create and implement standard failure analysis processes using a range of analysis equipment.
- Organize logistics and instructions to ensure failure analysis proceeds systematically.
- Record and present analysis findings to management.
- Provide technical guidance on failure analysis questions.
- Build and maintain working relationships with failure analysis service providers and equipment vendors.
- Work with product, test, and design engineers to identify and characterize faults in new technologies.
- Isolate, identify, and characterize faults affecting yield and reliability.
- Coordinate with Product Test, Design, Quality, Assembly, and Foundry Engineering teams.
- Communicate and coordinate with customers and vendors.
Requirements
- Bachelor’s degree in Electrical or Electronics Engineering, or a related field; a master’s degree is preferred.
- At least 8 years of semiconductor failure analysis experience.
- Experience writing and carrying out failure analysis plans.
- Ability to interpret results from cross-section, X-ray, CSAM, TDR, FIB, SEM, TEM, IR/EMMI/OBIRCH, and other failure analysis techniques.
- Ability to specify hardware and configure setups for dynamic failure analysis using SIL and LSM.
- Experience isolating faults with ATE, Scan/ATPG, and MBIST.
- Knowledge of semiconductor technologies and processes across fabrication, assembly, and advanced packaging.
- Understanding of transistor operation, basic electronics, semiconductor device physics, and device behavior under varied operating conditions.
- Proficiency in ATE-docked dynamic fault isolation using LVP, LVI/SMI, LADA, and TIVA techniques.
- Knowledge of JEDEC IC qualification tests and requirements is beneficial.
- Practical experience directing physical failure analysis with suppliers.
- benefits
Benefits
- Medical, dental, and vision insurance.
- 401(k) plan with Cisco matching contributions.
- Paid parental leave.
- Short- and long-term disability coverage.
- Basic life insurance.
- Cisco restricted stock unit grants may be available, subject to eligibility.
- 10 paid holidays per full calendar year.
- One floating holiday for non-exempt employees.
- One paid day off for an employee’s birthday.
- Paid year-end holiday shutdown.
- Four paid personal wellness days.
- 16 vacation days per full calendar year for non-exempt employees.
- Flexible vacation time for exempt employees, without a set limit and subject to availability and business needs.
- 80 hours of sick time provided on the hire date and each January 1 thereafter.
- Carry forward up to 80 unused sick hours.
- Additional paid time off for critical or emergency family matters.
- Option to take 10 paid volunteer days per full calendar year.
- Annual bonuses for eligible non-sales roles.
- Performance-based incentive pay for eligible sales roles.