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Analog Devices
Analog Devices
Sponsor pentru viza H1BConsultanțăIndustria prelucrătoareLogistică
Analog Devices dezvoltă și produce circuite integrate pentru procesarea semnalelor analogice, mixte și digitale, destinate aplicațiilor complexe din domeniul auto, al automatizării industriale, al asistenței medicale, al comunicațiilor și al electronicelor de larg consum. Portofoliul companiei include tehnologia GMSL, care oferă conectivitate de mare viteză pentru vehicule și alte sisteme conectate. Activitatea companiei acoperă detectarea, procesarea semnalelor și conectivitatea, contribuind la dezvoltarea platformelor de condus inteligent și a produselor electronice de înaltă performanță.
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Senior AMS Design Verification Engineer in Valencia

Develop mixed-signal verification solutions for Analog Devices’ portable consumer semiconductor products in Valencia. Build AMS models, verification plans, and tests while tracking defects through Jira closure.

ESSpania
43.120 € – 62.440 € / an
La sediuNormă întreagăSeniorLimbă Obligatorie: englezăInginer
PerlPython

Descriere

  • Collaborate as a mixed-signal verification specialist within a multidisciplinary, multi-site team covering digital, analog, design verification, implementation, and layout.
  • Help refine verification strategies, processes, and methodologies.
  • Translate device requirements into a traceable AMS verification plan.
  • Create or generate SVRNM models for analog blocks and validate them against schematics.
  • Develop directed AMS tests or adapt constrained-random UVM test cases.
  • Log, manage, and resolve verification defects in Jira.
  • Record results for assigned tasks and review findings with the wider team.
  • Support new portable consumer product solutions and work directly with Tier 1 OEM customers.
  • Take on opportunities to supervise or mentor colleagues.

Cerințe

  • Degree in electronic engineering and at least five years of chip-level analog mixed-signal verification experience for SoCs.
  • Working knowledge of digital verification approaches, including UVM-based digital mixed-signal verification.
  • Proficiency with Cadence design flows, including schematic creation and simulator or netlist configuration.
  • Experience using mixed-signal simulators such as Cadence AMS or an equivalent platform.
  • Ability to develop SVRNM or Verilog-AMS behavioral models for analog blocks.
  • Strong programming, object-oriented development, and technical documentation abilities.
  • Scripting experience with Python, C, or Perl is advantageous.
  • Collaborative team member with strong analytical and debugging abilities.
  • Willingness to travel occasionally, with required travel of 10% of the time; applicants may undergo export licensing review unless they qualify as US Citizens, US Permanent Residents, or protected individuals under 8 U.S.C. 1324b(a)(3).s.
  • Some limited travel should be expected.
  • Required travel: 10% of the time

Beneficii

  • Discretionary bonus tied to individual performance.
  • Variable compensation may be offered.
  • Paid annual leave.
  • Supplementary benefits provided according to local policy and applicable employment terms.

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