Voyant Photonics
Voyant Photonics
Voyant Photonics develops compact LiDAR systems for machine perception in mobility and smart infrastructure. Its coherent imaging range sensors combine on-chip beam steering with production-released technology, helping detect people and objects for applications across automotive, logistics, and manufacturing.

Photonics Layout Engineer

Design silicon photonic chips for robotics LiDAR and AI data center optical switching. Own photonic integrated circuit layouts, automation, verification, and tapeout.

Tavsif

  • Design photonic integrated circuits, from component test structures to large system chips.
  • Translate photonic schematics and design requirements into efficient, manufacturable GDSII layouts.
  • Plan die and reticle floorplans, routing dense waveguides, and connecting optical layers.
  • Build and maintain parameterized photonic component cells and reusable layout libraries.
  • Write Python scripts and tools to automate layout generation, routing, and design checks.
  • Combine photonic and electrical layouts, including electrical routes, contact pads, and packaging interfaces.
  • Run and debug physical checks, including DRC, LVS, and optical connectivity verification.
  • Work with photonic designers, packaging engineers, and foundry partners to improve layouts and prepare tapeout submissions.
  • Lead PIC layouts from initial floorplanning through tapeout.

Talablar

  • Bachelor’s or master’s degree in electrical engineering, photonics, physics, optical engineering, or a related field.
  • At least two years of experience laying out photonic integrated circuits.
  • Proficiency with photonic layout tools such as GDSFactory, IPKISS, KLayout, or equivalent software.
  • Strong Python scripting skills, including experience with layout automation or parameterized designs.
  • Experience routing photonic waveguides, placing components, and integrating chip-level layouts.
  • Familiarity with silicon photonics foundry PDKs, design rules, and tapeout processes.
  • Careful attention to detail, problem-solving ability, and effectiveness in a multidisciplinary team.
  • Able to work onsite at the New York City headquarters or, if based outside the New York area and not relocating, travel as needed (25%).
  • Must address United States work authorization and sponsorship.
  • Preferred experience includes large-scale PIC layouts, optical switching networks, complex photonic routing, multilayer silicon or silicon nitride platforms, interlayer optical transitions, automated routing, placement optimization, layout generation algorithms, Cadence Virtuoso, SKILL, electrical layout and EDA integration, photonic-electronic co-layout, packaging interfaces, or commercial silicon photonics foundry tapeouts.

Imtiyozlar

  • Equity compensation.
  • Catered lunch each day at the headquarters.
  • Flexible scheduling instead of a fixed 9-to-5 schedule.

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