Cadence Design Systems
Cadence Design Systems
Cadence Design Systems develops computational software, hardware, and intellectual property for electronics and system design. With more than 30 years of software expertise and a focus on intelligent system design, the company helps leading organizations turn design concepts into advanced electronic products. Its technologies support work across hyperscale computing, 5G communications, automotive, mobile, aerospace, consumer, industrial, and healthcare applications.

Product Engineer II, Memory IP — Shanghai Onsite

Support Cadence Memory PHY IP products in Shanghai through subsystem integration, verification, implementation, and customer troubleshooting. Collaborate with customers and global engineering teams across pre-silicon and post-silicon activities.

Description

  • Support pre-silicon integration, deployment, and implementation of memory subsystem products
  • Assist with internal system integration and quality assurance testing for Controller and PHY products
  • Investigate complex subsystem application and implementation issues, providing technically sound customer guidance
  • Support SoC integration and implementation reviews for memory PHY and controller products
  • Help customers run RTL and gate-level simulations to validate functionality
  • Assist customers with timing closure and other physical integration activities
  • Develop and refine product documentation and application checklists for customers
  • Support customer post-silicon bring-up and production testing when required
  • Provide prompt, comprehensive, and technically accurate responses to customer inquiries
  • Use AI-powered tools and assistants to improve productivity, decision-making, and the quality of customer deliverables
  • Apply AI-powered analytics to identify patterns, derive insights, and produce actionable recommendations from complex datasets
  • Serve as a key liaison among customers, Cadence R&D, and System Validation teams
  • Coordinate with globally distributed teams while managing multiple priorities

Requirements

  • Bachelor’s degree in Electrical or Computer Engineering, or a related field, with at least two years of relevant industry experience; alternatively, a master’s degree in one of these fields
  • Experience with DDR5/4/3, LPDDR5/4/3, HBM3, GDDR6, or comparable memory IP
  • Experience in Verilog RTL design and gate-level verification
  • Experience with synthesis and static timing analysis
  • Familiarity with standard DFT flows and testing methodologies
  • Familiarity with package and board design
  • Ability to interpret schematics and contribute to signal- and power-integrity reviews for customer board and package implementations
  • Preferred: Master’s degree in Electrical or Computer Engineering, or a related field, plus at least two years of relevant industry experience
  • Preferred: Experience with Memory PHY and DSP-based architectures
  • Preferred: Experience with embedded microcontroller firmware

Benefits

  • Work alongside an experienced team and leading technology companies
  • Contribute to high-performance Memory PHY IP products
  • Use AI-powered tools and assistants to improve productivity and decision-making

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