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Marvell Technology
Marvell Technology
5,001 – 10,000 Employees
ConsultingEnterpriseManufacturing
Marvell Technology develops semiconductor and infrastructure solutions for consumer and enterprise applications. Its portfolio spans wired and wireless connectivity, storage, cloud infrastructure, and IoT technologies, with teams working closely with partners to tailor products to changing technical and business requirements. The company’s hiring context is rooted in advanced semiconductor manufacturing, infrastructure engineering, consulting, and enterprise technology.
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Digital IC Design Intern (MS) – Marvell, Santa Clara Onsite

Join Marvell’s Santa Clara team to develop and verify RTL blocks for cloud, AI, storage, and networking semiconductors. The internship includes synthesis, timing and power analysis, and collaboration across the chip-design organization.

USUnited StatesCACaliforniaIDIdahoNYNew YorkTXTexas
$35 – $70 / hour
On-siteInternshipEntry levelEnglish RequiredDesigner
PerlPython

Description

  • Contribute to digital chip design and implementation projects
  • Develop and verify high-performance RTL blocks
  • Apply digital design specifications to high-speed connectivity devices and next-generation chips
  • Perform synthesis, static timing analysis, timing signoff, and power analysis
  • Debug design issues and validate functional correctness
  • Evaluate and implement new design techniques and development flows
  • Investigate emerging methodologies that improve design quality, efficiency, and productivity
  • Collaborate with architecture, design verification, and physical design teams
  • Address complex engineering problems while contributing to data-infrastructure products

Requirements

  • Be enrolled in a master’s degree program in electrical engineering, computer engineering, or a related discipline
  • Expect to graduate between Fall 2027 and Summer 2028
  • Have completed coursework in areas such as circuit design, circuit theory, digital logic, static timing analysis, computer architecture, Verilog, VLSI, digital signal processing, SoC/ASIC design, or electronics
  • Demonstrate proficiency in programming and scripting languages including Python, Perl, or Tcl
  • Have experience with Synopsys PrimeTime, Cadence Virtuoso and Spectre X, and Mentor tools
  • Bring hands-on RTL design experience and an understanding of its role in the broader ASIC design flow
  • Demonstrate strong analytical, problem-solving, and communication abilities
  • Be eligible to access export-controlled information under applicable U.S. law; some applicants may require export license review

Benefits

  • Medical, dental, and vision coverage
  • Employee perks and discounts
  • Comprehensive mental health resources
  • Paid holidays
  • Potential additional compensation for interns pursuing a PhD

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