Remote Travel Designer
CanvaPlan and book tailored trips for individuals, couples, families, and groups in a remote role. Coordinate itineraries, travel suppliers, and client communications, with training provided.
Open
Fidus Systems is an electronics and hardware design consultancy that helps manufacturers turn complex concepts into dependable products. Its engineering teams work across FPGA and ASIC design, verification and validation, embedded software, PCB layout, signal and power integrity, and mechanical and thermal engineering. The company supports projects involving AMD and Intel technologies and serves demanding applications in aerospace, telecommunications, medical devices, and consumer electronics. With flexible engagement models, Fidus Systems provides specialized design expertise from early development through product validation.
Senior ASIC and FPGA Verification Designer
Lead ASIC and FPGA verification for Fidus Systems, developing UVM, formal, and assertion-based environments. Support advanced electronic product projects through coverage closure, client collaboration, and verification leadership.
Description
- Lead block- and system-level verification of ASIC and FPGA designs from test-plan creation through coverage closure
- Build UVM, formal, and assertion-based verification environments with constrained-random techniques
- Create behavioral models and test cases to meet functional coverage objectives
- Establish and monitor coverage metrics through closure
- Investigate and resolve simulation and regression failures
- Partner with designers and system architects to address technical issues
- Automate verification workflows and monitor regressions with Python, Perl, or Tcl
- Plan, deliver, and report on multiple verification efforts as verification lead
- Advise external clients on verification strategy and provide verification support
- Coordinate with FPGA/DSP, hardware, embedded software, verification, SI/PI, PCB layout, and mechanical/thermal engineering teams
- Deliver electronic systems for clients in space, communications, compute, storage, video, imaging, VR/AR, industrial, medical, and automotive markets
Requirements
- At least 8 years of ASIC/FPGA verification experience with demonstrated ownership as a verification lead
- Advanced knowledge of SystemVerilog and UVM methodology
- Hands-on experience with constrained-random verification
- Experience applying functional coverage, assertions, and formal verification methods
- Familiarity with Ethernet, DDR/LPDDR, HBM, security, networking, AXI, NoC, and ARM CPU subsystems
- Experience with cocotb, pyUVM, or DPI-C is advantageous
- Proficiency in Python, Perl, or Tcl
- Excellent debugging, analytical, and problem-solving abilities
- Effective interpersonal, communication, and teamwork skills with confidence in client-facing work
- Willingness to incorporate AI into a modern engineering toolkit
- Bachelor’s or master’s degree in electrical engineering, computer engineering, or a related discipline
- Availability for possible domestic and international travel
Benefits
- Medical, dental, and vision coverage
- 401(k) contributions with employer matching
- Annual profit-sharing bonus
- Additional supplementary benefits
- Fully remote work arrangement
- Support for domestic and international travel related to customer engagements and project delivery
Related Jobs
Senior Plumbing Engineer and Designer, Data Centers
AECOM
Lead plumbing engineering and design for hyperscale data centers at AECOM, a global infrastructure consulting firm. This U.S. remote role includes occasional site visits and client collaboration.
Open
Senior Plumbing Engineer/Designer, Data Centers
AECOMLead plumbing design for hyperscale data centers at AECOM, a global infrastructure consulting firm. This U.S.-remote role includes occasional site visits and client collaboration.
Open
Game Design Subject Matter Expert
RevStar
Shape RevStar’s interactive learning modules and graphics systems by building scalable templates, gameplay frameworks, and UI/UX standards.
Open
Senior Design Systems Lead
Discovery EducationLead the unification of Discovery Education’s Atlas and Nebula design systems. Shape scalable architecture, governance, and design-to-engineering workflows across its educational products.
Open
In-Building RF Design and Deployment Engineer
Communication Technology Services (CTS)Design and deploy in-building DAS and small-cell systems for Communication Technology Services. Review iBwave designs, coordinate installations, commission signal sources, and troubleshoot performance.
Open