Marvell Technology
Marvell Technology
5,001 – 10,000 Employees
ConsultingEnterpriseManufacturing
Marvell Technology develops semiconductor and infrastructure solutions for consumer and enterprise applications. Its portfolio spans wired and wireless connectivity, storage, cloud infrastructure, and IoT technologies, with teams working closely with partners to tailor products to changing technical and business requirements. The company’s hiring context is rooted in advanced semiconductor manufacturing, infrastructure engineering, consulting, and enterprise technology.

Marvell Digital IC Design Intern (MS) - Santa Clara Onsite

Design and verify RTL blocks for Marvell semiconductor products spanning cloud, AI, storage, and networking. Perform synthesis, timing, and power analysis while contributing to real chip design projects.

Description

  • Work on the digital design and implementation of production chip projects
  • Create and verify detailed, high-performance RTL blocks
  • Translate digital design specifications into high-speed connectivity and next-generation chip designs
  • Run synthesis, static timing analysis, timing signoff, and power analysis
  • Troubleshoot design issues and validate functional behavior
  • Evaluate and implement new design techniques and development flows
  • Investigate emerging methodologies that improve design quality, efficiency, and productivity
  • Partner with architecture, verification, and physical design teams on complex technical problems
  • Help develop products as part of a collaborative engineering team

Requirements

  • Currently pursuing a master's degree in electrical engineering, computer engineering, or a related discipline
  • Expected to graduate between fall 2027 and summer 2028
  • Completed coursework in areas such as circuit design, circuit theory, digital logic, static timing analysis, computer architecture, Verilog, VLSI, digital signal processing, SoC or ASIC design, or electronics
  • Proficient in programming and scripting languages including Python, Perl, and Tcl
  • Experienced with Synopsys PrimeTime, Cadence Virtuoso and Spectre X, and Mentor tools
  • Hands-on RTL design experience with a solid understanding of its role in the complete ASIC design flow
  • Strong analytical, problem-solving, and communication abilities
  • Must be authorized under applicable U.S. law to access export-controlled information and may undergo an export license review

Benefits

  • Medical, dental, and vision insurance coverage
  • Employee perks and discount programs
  • Comprehensive mental health support
  • Paid holidays
  • Additional compensation may be available to interns pursuing a PhD

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