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Normal Computing
Normal Computing
51 – 200 Employees
The available profile information identifies Normal Computing as a company founded in 2022, but does not describe its products, services, industry, or hiring context. More company-specific details are needed to provide a useful overview for job seekers.
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Compiler Frontend Engineer, LLM Architectures

Extend compiler support for emerging LLM architectures, from attention variants and MoE routing to quantization and numeric formats. Validate model bring-up on simulators and FPGA prototypes for Normal Computing’s in-memory AI hardware.

USUnited StatesCACaliforniaHybridFull-timeMiddleSeniorEnglish RequiredFrontend EngineerSoftware Engineer
C++PythonPyTorchRust

Description

  • Extend frontend and mid-level compiler support for emerging LLM architectures.
  • Implement attention variants, MoE routing schemes, and other architectures in the compiler.
  • Expand the IR, operations, and lowering passes to represent new architectural primitives accurately.
  • Maintain test coverage as the compiler evolves.
  • Represent quantization schemes and numeric formats while preserving model accuracy.
  • Monitor developments in LLM architectures and recommend priorities for future compiler support.
  • Pass lowered programs to backend compiler engineers for hardware mapping.
  • Work with the LLM serving engineer to move models from compiler support into serving.
  • Validate compiler bring-up with simulators and FPGA prototypes before silicon is available.

Requirements

  • Hands-on experience developing and shipping ML compiler passes.
  • Strong familiarity with PyTorch internals, ideally including TorchDynamo, FX, and torch.export.
  • Working knowledge of modern LLM architectures, including attention mechanisms, MoE routing, and quantization schemes.
  • Comfort designing compiler infrastructure in a new codebase and extending an established one.
  • Comfort building software for evolving hardware, from simulation through bring-up.
  • Fluency in Python.
  • Familiarity with C++ or Rust.
  • Experience with IREE, XLA, or TVM is a plus.
  • Familiarity with JAX or ONNX is a plus.
  • Experience partitioning models across devices with tensor, pipeline, or expert parallelism is a plus.
  • Experience with hardware-software co-design is a plus.
  • Experience with non-standard or in-memory hardware targets is a plus.
  • Contributions to open-source compiler or ML infrastructure projects are a plus.

Benefits

  • Research-adjacent work with the opportunity to publish on behalf of Normal Computing.
  • Work on pre-silicon hardware using simulators and FPGA prototypes.
  • Inclusive workplace with an Equal Employment Opportunity commitment.
  • Reasonable accommodations are available for individuals with disabilities.

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