Boeing is a global aerospace manufacturer and defense company that develops and produces commercial airplanes, rotorcraft, rockets, satellites, telecommunications equipment, and missiles. Its operations span Boeing Commercial Airplanes, Boeing Defense, Space & Security, and Boeing Global Services, bringing together large engineering, manufacturing, and support teams. The company also contributes to aerospace research and exploration initiatives, including projects with NASA, while pursuing lower-emission aviation technologies and next-generation aircraft. For job seekers, Boeing offers opportunities connected to aerospace manufacturing, defense, space systems, engineering, services, and related technical disciplines.
Senior ASIC/FPGA Verification Engineer
Build UVM and SystemVerilog verification environments for Boeing digital ICs and SoCs. This onsite role is based in El Segundo or Huntington Beach, California.
Description
- Develop digital ICs and SoCs for Boeing programs.
- Design ASIC/FPGA verification environments with UVM and SystemVerilog.
- Create reusable, self-checking testbenches using object-oriented programming.
- Build UVM drivers, monitors, predictors, and scoreboards.
- Develop functional coverage models and analyze code coverage.
- Run regression tests, gather coverage metrics, and monitor verification progress.
- Help prototype and validate designs using FPGAs.
- Work with design, systems engineering, and other cross-functional teams.
- Contribute to ASIC/FPGA design and verification for electronics developed in El Segundo and other Boeing locations.
Requirements
- Bachelor’s degree or equivalent in engineering, engineering technology, computer science, engineering data science, mathematics, physics, or chemistry.
- Experience with ASIC/FPGA verification processes.
- Familiarity with ASIC/FPGA verification architecture using SystemVerilog and UVM.
- Proficiency in SystemVerilog and SystemVerilog Assertions.
- Experience implementing test plans.
- Knowledge of object-oriented programming concepts, including inheritance and polymorphism.
- Ability to create reusable, self-checking testbenches.
- Experience developing functional coverage models and closing code coverage.
- Ability to establish accurate, verifiable ASIC/FPGA-level specifications with design and systems engineering.
- Familiarity with waveform debugging tools.
- Experience using SVN, CVS, or Git.
- Proficiency with Linux.
- U.S. Person status is required to comply with U.S. export controls.
- Ability to obtain a U.S. security clearance; U.S. citizenship is required by the U.S. Government for clearance.
- The employer does not sponsor employment visas.
- Associate level: typically at least 2 years of related experience or an equivalent combination of technical education and experience.
- Experienced level: at least 5 years of related experience or an equivalent combination of education and experience.
- Lead level: at least 9 years of related experience or an equivalent combination of education and experience.
- Preferred: master’s degree in electrical engineering, computer engineering, computer science, or a related field.
- Preferred: experience with hardware-based integration and testing of ASIC/FPGA designs.
- Preferred: hardware emulator experience, especially with Palladium.
- Preferred: experience with high-speed SerDes interfaces such as JESD204C, PCIe, and Ethernet.
- Preferred: scripting experience with Make, Perl, or Python.
- Preferred: knowledge of space-based design techniques and radiation mitigation.
- Preferred: record of successful first-pass ASIC designs.
Benefits
- Relocation assistance, subject to candidate eligibility.
- Eligibility for a referral bonus.
- Competitive base pay and opportunities for variable compensation.
- Health insurance.
- Flexible spending accounts.
- Health savings accounts.
- Retirement savings plans.
- Life and disability insurance programs.
- Paid and unpaid time away from work.
- First-shift schedule.