Marvell Technology
Marvell Technology
5,001 – 10,000 Employees
ConsultingEnterpriseManufacturing
Marvell Technology develops semiconductor and infrastructure solutions for consumer and enterprise applications. Its portfolio spans wired and wireless connectivity, storage, cloud infrastructure, and IoT technologies, with teams working closely with partners to tailor products to changing technical and business requirements. The company’s hiring context is rooted in advanced semiconductor manufacturing, infrastructure engineering, consulting, and enterprise technology.

Digital IC Design Intern - Marvell Technology, Santa Clara Onsite

Join Marvell Technology in Santa Clara to develop and verify RTL blocks for semiconductor products. The internship covers ASIC analysis and collaboration across architecture, verification, and physical design.

Description

  • Work on digital design and implementation for real chip projects
  • Create and verify detailed, high-performance RTL blocks
  • Translate digital design specifications into solutions for high-speed connectivity and next-generation chips
  • Perform synthesis, static timing analysis, timing signoff, and power analysis
  • Debug design issues and validate functional correctness
  • Evaluate and implement new design techniques and development flows
  • Assess emerging methodologies that improve design quality, efficiency, and productivity
  • Partner with chip architecture, design verification, and physical design teams
  • Address complex engineering problems while contributing to production products

Requirements

  • Currently pursuing a bachelor's degree in electrical engineering, computer engineering, or a related discipline
  • Expected to graduate between fall 2027 and summer 2028
  • Coursework in circuit design, circuit theory, digital logic, static timing analysis, computer architecture, Verilog, VLSI, digital signal processing, SoC or ASIC design, or electronics
  • Programming and scripting experience with tools such as Python, Perl, and Tcl
  • Experience with Synopsys PrimeTime, Cadence Virtuoso and Spectre X, and Mentor tools
  • Practical RTL design experience and an understanding of how RTL fits into the broader ASIC design flow
  • Strong analytical, problem-solving, and communication abilities
  • Must be eligible under applicable U.S. law to access export-controlled information; some applicants may undergo export license review

Benefits

  • Medical, dental, and vision insurance coverage
  • Employee perks and discounts
  • Comprehensive mental health support
  • Paid holidays
  • Additional compensation may be available to interns pursuing a PhD

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